Fig. 1. Lymnaea neurons on a silicon chip paired in a soma–soma configuration. (a) A hybrid design depicting the relationship between neuronal connectivity and its interfacing with various chip components. G, gate; S, source; D, drain. (b) Photomicrograph of soma–soma paired presynaptic neurons visceral dorsal 4 (VD4-left) and its postsynaptic partner left pedal dorsal one (LPeD1 – larger cell) interfaced with silicon chip on a linear array of capacitors and transistors. Scale bar, 20 µm. Figure taken from (Kaul et al., 2004).